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UWT1V4R7MCL1GB资料 | |
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UWT1V4R7MCL1GB PDF Download |
File Size : 116 KB
Manufacturer:NICHICON Description:NOTES: 1. Inputs are capable of translating the following interface standards. User can select between: Single-ended 2.5V LVTTL levels Single-ended 1.8V LVTTL levels or Differential 2.5V/1.8V LVTTL levels Differential HSTL and eHSTL levels Differential LVEPECL levels 2. Outputs are user selectable to drive 2.5V, 1.8V LVTTL, eHSTL, or HSTL interface levels when used with the appropriate VDDQ voltage. 3. 3 level inputs are static inputs and must be tied to VDD or GND or left floating. These inputs are not hot-insertable or over-voltage tolerant. 4. Because the gate controls are asynchronous, runt pulses are possible. It is the user's responsibility to either time the gate control signals to minimize the possibility of runt pulses or be able to tolerate them in down stream circuitry. 5. Pins listed as LVTTL inputs will accept 2.5V signals when RxS = HIGH or 1.8V signals when RxS = LOW or MID. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:UWT1V4R7MCL1GB 厂 家:NICHICON 封 装:06+ 批 号:SMD 数 量:150000 说 明:【自己库存】 |
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