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| UWT1V100MCL1GB资料 | |
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UWT1V100MCL1GB PDF Download |
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File Size : 116 KB
Manufacturer:NICHICON Description:Analog Ground. Receive Input. Analog receive input. This pin is internally biased at about 1.5V in series with 50 kΩ. Test Mode Control 1 and 2. Internal test modes are enabled within the device by using TMC1 and TMC2. Users must tie these pins to the ground plane. PLL Filter 1 and 2. An external capacitor (0.1µF $20%) is connected between these pins. Receive Loss-of-signal. This pin us set high on loss of the data signal at the receive input. (See Table 7) Receive PLL Loss-of-lock. This pin is set high on loss of PLL frequency lock. Digital Ground for PLL Clock. Ground lead for all circuitry running synchronously with PLL clock. Digital Ground for EXCLK. Ground lead for all circuitry running synchronously with EXCLK. 5V Digital Supply ($10%) for PLL Clock. Power for all circuitry running synchronously with PLL clock. 5V Digital Supply ($10%) for EXCLK. Power for all circuitry running synchronously with EXCLK. External Reference Clock. A valid DS3 (44.736MHz $100ppm) or STS-1 (51.84MHz + 100ppm) clock must be provided at this input. The duty cycle of EXCLK, referenced to VDD /2 levels, must be within 40% - 60% with a minimum rise and fall time (10% to 90%) of 5ns. Receive Clock. Recovered clock signal to the terminal equipment. Receive Negative Data. Negative pulse data output to the terminal equipment. (See Figure 11.) Receive Positive Data. Positive pulse data output to the terminal equipment. (See Figure 11) In-circuit Test Control (Active-low). If ICT is forced low, all digital output pins (RCLK, RPDATA, RNDATA, RLOS, RLOL) are placed in a high-impedance state to allow for in-cir- cuit testing. There is an internal pull-up on this pin. Receive Equalization Bypass. A high on this pin bypasses the internal equalizer. A low places the equalizer in the data path. Loss-of-signal Threshold Control. The voltage forced on this pin controls the input loss- of-signal threshold. Three settings are provided by forcing GND, VDD/2, or VDD. This pin must be set to the desired level upon power-up and should not be changed during opera- tion. 5V Analog Supply ($10%). |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：UWT1V100MCL1GB 厂 家：NICHICON 封 装：06+ 批 号：SMD 数 量：150000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
| 手 机：13798377798 |
| QQ：819175396,302677436,343000888 |
| MSN：mwdsmd@hotmail.com,xiaowei700@hotmail.com |
| 传 真：0755-83177555 |
| EMail：mwdsmd@126.com |
| 公司地址： 深圳市福田区振中路鼎诚国际1018室 |
