 |
|||||||
|
|||||||
|
|
|||||||
|
|||||||
|
|
| TMCMC1C226MTRF资料 | |
|
TMCMC1C226MTRF PDF Download |
|
File Size : 116 KB
Manufacturer:HITACHI Description: The IDT5T929 generates a high precision FEC (Forward Error Cor- rection) or non-FEC source clock for SONET/SDH systems as well as a source clock for Gigabit Ethernet systems. This device also has clock regeneration capability: it creates a "clean" version of the clock input by using the internal oscillator to square the input clock's rising and falling edges and remove jitter. In the event that the main clock input fails, the device automatically locks to a backup reference clock using a hitless switchover mechanism. This device detects loss of valid CLKIN and leaves the VCO of the PLL at the last valid frequency while an alternate input REFIN is selected. If CLKIN and REFIN are different frequencies, the multiplication factor will be adjusted to retain the same output frequency. The IDT5T929 can act as a translator from a differential LVPECL, LVDS, or single-ended LVTTL input to LVPECL or LVDS outputs. The IDT5T929-10 has LVDS outputs and the IDT5T929-30 has LVPECL outputs. The two modes of output frequency range are controlled by the SELmode. When SELmode is high or low, the QOUT is a multiplied version of the input clock while QREG is a regenerated version of the input clock. |
|
| 相关型号 | |
| ◆ Z3A43Y680M510KAT2A | |
| ◆ Y4C3F104Z500CT | |
| ◆ XCC44N3F470KG1 | |
| ◆ X7R224J5B | |
| ◆ WR06X103JT | |
| ◆ W3L1ZC105MAT1F | |
| ◆ W3A4YG104ZAT1A | |
| ◆ W3A4YC104MAT2A | |
| ◆ W3A45C102MA2TA | |
| ◆ W3A45A470KAT2A | |
| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
|
型 号：TMCMC1C226MTRF 厂 家：HITACHI 封 装：06+ 批 号：SMD 数 量：80000 说 明：【自己库存】 |
|||||
|
运 费： 所在地： 新旧程度： |
|||||
| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
| 手 机：13798377798 |
| QQ：819175396,302677436,343000888 |
| MSN：mwdsmd@hotmail.com,xiaowei700@hotmail.com |
| 传 真：0755-83177555 |
| EMail：mwdsmd@126.com |
| 公司地址： 深圳市福田区振中路鼎诚国际1018室 |
