 |
|||||||
|
|||||||
|
|
|||||||
|
|||||||
|
|
| GRM42-6F224Z资料 | |
|
GRM42-6F224Z PDF Download |
|
File Size : 116 KB
Manufacturer:MURATA Description:When decimating, the user should likewise bring SYNC HIGH for at least one clock cycle, returning it LOW when a fresh output is desired. The chip will continue to update the output register on alternate rising edges of CLK. The user may leave SYNC LOW or change its value once per clock cycle, with equivalent results. The chip can be powered up and operated with SYNC grounded, but the host system wont know whether the data outputs are updated on even- or odd-numbered system clock cycles. In any half-band deci- mating filter, a given single-cycle impulses arrival time (on an odd versus an even clock cycle) determines whether it generates a half-amplitude two-cycle impulse or a half- speed, 40-clock, filtered output shaped by the nonzero, non- center coefficients. The SYNC control permits the host sys- tem to obtain consistent results. In two-channel mode, it must remain low after the first incoming data value. |
|
| 相关型号 | |
| ◆ Z3A43Y680M510KAT2A | |
| ◆ Y4C3F104Z500CT | |
| ◆ XCC44N3F470KG1 | |
| ◆ X7R224J5B | |
| ◆ WR06X103JT | |
| ◆ W3L1ZC105MAT1F | |
| ◆ W3A4YG104ZAT1A | |
| ◆ W3A4YC104MAT2A | |
| ◆ W3A45C102MA2TA | |
| ◆ W3A45A470KAT2A | |
| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
|
型 号：GRM42-6F224Z 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：120000 说 明：【自己库存】 |
|||||
|
运 费： 所在地： 新旧程度： |
|||||
| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
| 手 机：13798377798 |
| QQ：819175396,302677436,343000888 |
| MSN：mwdsmd@hotmail.com,xiaowei700@hotmail.com |
| 传 真：0755-83177555 |
| EMail：mwdsmd@126.com |
| 公司地址： 深圳市福田区振中路鼎诚国际1018室 |
