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| GRM42-2X5R106K16U539资料 | |
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GRM42-2X5R106K16U539 PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description:The on-chip DPLL meets Telcordia GR-1244-CORE stratum 4 specifications (Stratum 4). It accepts a dedicated timing reference input at either 8 kHz, 1.544 MHz or 2.048 MHz. Alternatively, the reference can be replaced by an internal 8 kHz signal derived from the ST-BUS input frame boundary. The DPLL provides reference monitor, jitter attenuation and free run functions. It can be used as a systems ST-BUS timing source which is synchronized to the network. The DPLL can also be bypassed so that the device operates under system timing. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：GRM42-2X5R106K16U539 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：120000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
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