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GRM42-2W5R472K500V资料 | |
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GRM42-2W5R472K500V PDF Download |
File Size : 116 KB
Manufacturer:MURATA Description:A LOW signal on SR overrides the Select inputs and allows the flip-flops to be reset by the next rising edge of CP All other state changes are also initiated by the LOW-to-HIGH CP transition Inputs can change when the clock is in either state provided only that the recommended setup and hold times relative to the rising edge of CP are observed A HIGH signal on either OE1 or OE2 disables the TRI- STATE buffers and puts the I O pins in the high impedance state In this condition the shift load hold and reset opera- tions can still occur The TRI-STATE buffers are also dis- abled by HIGH signals on both S0 and S1 in preparation for a parallel load operation |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:GRM42-2W5R472K500V 厂 家:MURATA 封 装:06+ 批 号:SMD 数 量:120000 说 明:【自己库存】 |
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