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| GRM31AR33A680KY01D资料 | |
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GRM31AR33A680KY01D PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description:The READ instruction outputs the serial data of the addressed memory location on the DO pin. A dummy zero bit precedes the 16 bit (x16 organization) or 8 bit (x8 organization) output string. The output data bits will toggle on the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is pos- sible when CS is held high. The memory data will auto- matically cycle to the next register and output sequentially. |
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| 相关型号 | |
| ◆ Z3A43Y680M510KAT2A | |
| ◆ Y4C3F104Z500CT | |
| ◆ XCC44N3F470KG1 | |
| ◆ X7R224J5B | |
| ◆ WR06X103JT | |
| ◆ W3L1ZC105MAT1F | |
| ◆ W3A4YG104ZAT1A | |
| ◆ W3A4YC104MAT2A | |
| ◆ W3A45C102MA2TA | |
| ◆ W3A45A470KAT2A | |
| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：GRM31AR33A680KY01D 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：240000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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| 联系人：陈生 |
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