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| GRM31A7U2J102JW31D资料 | |
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GRM31A7U2J102JW31D PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description:C 500 ns instruction cycle at 24 MHz operation Superset of the 8051 architecture with 8 datapointers On-chip emulation support logic (Enhanced Hooks Technology TM) 32K byte on-chip ROM (with optional ROM protection) C alternatively up to 64K byte external program memory Up to 64K byte external data memory 256 byte on-chip RAM Additional 2K byte on-chip RAM (XRAM) Seven 8-bit parallel I/O ports Two input ports for analog/digital input |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：GRM31A7U2J102JW31D 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：240000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
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