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| GRM21BR61E335KA12L资料 | |
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GRM21BR61E335KA12L PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description: The GRM21BR61E335KA12L/72V12165/72V13165/72V14165/72V15165 devices are First-In, First-Out (FIFO) memories with clocked read and write controls. These FIFOs have 16-bit input and output ports. The input port is controlled by a free-running clock (WCLK), and an input enable pin (WEN). Data is written into the Multimedia FIFO on every clock when WEN is asserted. The output port is controlled by another clock pin (RCLK) and another enable pin (REN). The Read Clock (RCLK) can be tied to the Write Clock for single clock operation or the two clocks can run asynchronous of one another for dual-clock operation. An Output Enable pin (OE) is provided on the read port for three-state control of the output. These Multimedia FIFOs support three fixed flags: Empty Flag (EF), Full Flag (FF), and Half Full Flag (HF). |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：GRM21BR61E335KA12L 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：320000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
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