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GRM21BB31A106KE18L资料 | |
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GRM21BB31A106KE18L PDF Download |
File Size : 116 KB
Manufacturer:MURATA Description:Counter enable inputs are provided to stall the operation of the address input and utilize the internal address generated by the internal counter for fast interleaved memory applications. A ports burst counter is loaded with the ports Address Strobe (ADS). When the ports Count Enable (CNTEN) is asserted, the address counter will increment on each LOW-to-HIGH transition of that ports clock signal. This will read/write one word from/into each successive address location until CNTEN is deasserted. The counter can address the entire memory array and will loop back to the start. Counter Reset (CNTRST) is used to reset the burst counter. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:GRM21BB31A106KE18L 厂 家:MURATA 封 装:06+ 批 号:SMD 数 量:120000 说 明:【自己库存】 |
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