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| GRM21BB11E474KC01L资料 | |
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GRM21BB11E474KC01L PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description:• In Table 18 corrected description of OSC_SEL (on pin ROM_ADDR13). It should be set to 1 to indicate usage of a single-ended clock oscillator. • Corrected image and orientation of logo in pin out diagram Figure 2. • Added section 4.11.3. • Replaced all occurrences of CVDD with CVDD_2.5, including pin numbers 26, 88, 134 and 203 to make them consistent with the names of other 2.5V voltage supply signals. • Pin number 205 name changed from GPIO16/HFS to GPIO16/HFSn and all occurrences of HFS replaced with HFSn to reflect the fact that this signal is active low. • Added description of 2-wire serial protocol in section 4.17.2 and Table 24. • Removed Read with Increment operation description. • Corrected mechanical specification in Figure 32. • Changes to Table 21 C DC Characteristics: - Maximum voltage for 5V-tolerance inputs is 5.5V. - Added maximum current requirements. • Added description of OCM Standalone configuration Figure 26. • Added Figure 22 C Panel Power Sequencing. • Added description of gm5125 (SXGA device). • Pin names changed to reflect alternate hard-wired functions: - pin 50 from GPIO11 to GPIO11/ROM_WEn, - pin 51 from GPIO12 to GPIO12/NVRAM_SDA, - pin 52 from GPIO13 to GPIO13/NVRAM_SCL, - pin 6 from DDC_SCL to GPIO14/DDC_SCL, - pin 7 from DDC_SDA to GPIO15/DDC_SDA, - pin 46 from GPIO6 to GPIO6/TCON_SHC, - pin 47 from GPIO7 to GPIO7/TCON_TDIV. • Removed description of 6-wire host interface, since this is not recommended operation. Pin 1 name changed from GPIO17/HDATA0 to GPIO17, and similarly for pins 206, 207 and 208. • Corrected maximum ADC sampling frequency in Table 15 and maximum ADC_CLK frequency in Table 22 to 162.5MHz. • Added section 4.5 Test Pattern Generator. • Added description of TCON_SHC and TCON_TDIV in section 4.13.1. • Clarifications to section 4.1 describing clock generation, section 4.7.2 describing sRGB support, and section 4.15.3 describing GPIOs. • Removed mention of row attributes in Figure 25. gm5115/25 OSD controller does not have row attributes. • Corrected Table 21, Note 3. Pins VDD1_ADC_2.5, VDD2_ADC_2.5, VDD_RX0_2.5, VDD_RX1_2.5 and VDD_RX2_2.5 are digital 2.5V supplies, not analog. • Changed signal names SCL and SDA to HCLK and HFSn, respectively in Figure 29, Figure 30, and Figure 31. • Added note on Front Cover regarding HDCP enabled versions. • Added section 4.12 - Energy Spectrum Management (ESM). • Added clarification in section 4.13.1 indicating that single bus configurations are supported in XGA column drivers only. • In section 4.16, clarified that ROM_ADDR[15:0] have internal 60KΩ pull-down resistor. • Changes to Table 20 C Absolute Maximum Ratings: C Renamed parameters JA_XGA, JA_SXGA, JC_XGA and JC_SXGA to JA_5115, JA_5125, JC_5115 and JC_5125 and revised their values. C Added note (4) regarding the maximum case temperature. • Changes to Table 21 C DC Characteristics: C Renamed parameters P5115 and P5125 and revised their values. C Revised the values of PLP and ILP. C Renamed parameters I5115, I5115_2.5_VDD, etc. C Added note (6). • Removed the clock speed column from section 6 C Ordering Information and added the ordering information for gm5115-H and gm5125-H. • Replaced occurrences of TMDS with DVI. • Changed TCON_RCLK to TCON_ROWCLK in Figure 2 and in Table 7. • Changed RCLK to ROWCLK in 4.13.2 and in Figure 24. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：GRM21BB11E474KC01L 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：120000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
| 手 机：13798377798 |
| QQ：819175396,302677436,343000888 |
| MSN：mwdsmd@hotmail.com,xiaowei700@hotmail.com |
| 传 真：0755-83177555 |
| EMail：mwdsmd@126.com |
| 公司地址： 深圳市福田区振中路鼎诚国际1018室 |
