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| GRM2195C1H123JA01D资料 | |
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GRM2195C1H123JA01D PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description:These FIFOs provide solutions for a wide variety of data buffering needs, including high-speed data acquisition, multiprocessor interfaces, and communications buffer- ing. These FIFOs have separate input and output ports that are controlled by separate clock and enable sig- nals. The input port is controlled by a free running clock (CKW) and a write enable pin ENW . When ENW is asserted, data is written into the FIFO on the rising edge of the CKW signal. While ENW is held active, data is continually written into the FIFO on each CKW cycle. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：GRM2195C1H123JA01D 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：320000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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