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| GRM2165C1H152JA01D资料 | |
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GRM2165C1H152JA01D PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description:At 333 MHz (3.0 ns) core instruction rate, the ADSP-21365/6 performs 2 GFLOPS/666 MMACS 3M bit on-chip SRAM (1M Bit in blocks 0 and 1, and 0.50M Bit in blocks 2 and 3) for simultaneous access by the core pro- cessor and DMA 4M bit on-chip mask-programmable ROM (2M bit in block 0 and 2M bit in block 1) Dual Data Address Generators (DAGs) with modulo and bit- reverse addressing Zero-overhead looping with single-cycle loop setup, provid- ing efficient program sequencing Single Instruction Multiple Data (SIMD) architecture provides: Two computational processing elements Concurrent execution Code compatibility with other SHARC family members at the assembly level Parallelism in busses and computational units allows sin- gle cycle execution (with or without SIMD) of a multiply operation, an ALU operation, a dual memory read or write, and an instruction fetch Transfers between memory and core at a sustained 5.4G bytes/s bandwidth at 333 MHz core instruction rate |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：GRM2165C1H152JA01D 厂 家：MURATA 封 装：06+ 批 号：SMD 数 量：320000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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| 联系人：陈生 |
| 电 话：0755-82565235.0755-88391555.0755-82807567 |
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| 公司地址： 深圳市福田区振中路鼎诚国际1018室 |
