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| EEUFC1H101资料 | |
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EEUFC1H101 PDF Download |
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File Size : 116 KB
Manufacturer:Panasonic Description:When reading the RTC data, it is recommended to halt updates to the external set of double-buffered RTC registers. This puts the external registers into a static state allowing data to be read without register values changing during the read process. Normal updates to the internal registers continue while in this state. External updates are halted when a 1 is written into the read bit, B6 of the Control register (1FF8h). As long as a 1 remains in the Control register read bit, updating is halted. After a halt is issued, the registers reflect the RTC count (day, date, and time) that was current at the moment the halt command was issued. Normal updates to the external set of registers will resume within 1 second after the read bit is set to a 0. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：EEUFC1H101 厂 家：Panasonic 封 装：07+ 批 号：DIP 数 量：150000 说 明：【自己库存】 |
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| 联系人：陈生 |
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