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| CM316W5R105K25VAT资料 | |
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CM316W5R105K25VAT PDF Download |
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File Size : 116 KB
Manufacturer:KYOCERA Description:When hign, the PLL outputs are always driven when the PLL input clock is active. When low, the PLL remains locked on the input clock, if active, but output clocks are stopped. Pulled high via 10Kߟ resistor on the SO-DIMM . Only used on DDR2 SO-DIMMs with a PLL. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：CM316W5R105K25VAT 厂 家：KYOCERA 封 装：06+ 批 号：SMD 数 量：120000 说 明：【自己库存】 |
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运 费： 所在地： 新旧程度： |
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