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| CC0805KKX7R9BN104资料 | |
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CC0805KKX7R9BN104 PDF Download |
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File Size : 116 KB
Manufacturer:YAGEO Description: When setting S1 at a high level or S2 at a low level, the chip are in a non-selectable mode in which both reading and writing are disabled. In this mode, the output stage is in a high- impedance state, allowing OR-tie with other chips and memory expansion by S1 and S2. The power supply current is reduced as low as the stand-by current which is specified as ICC3 or ICC4, and the memory data can be held at +2V power supply, enabling battery back-up operation during power failure or power-down operation in the non-selected mode. |
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| 相关型号 | |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：CC0805KKX7R9BN104 厂 家：YAGEO 封 装：06+ 批 号：SMD 数 量：120000 说 明：【自己库存】 |
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