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| CA0612KRNPO9BN150资料 | |
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CA0612KRNPO9BN150 PDF Download |
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File Size : 116 KB
Manufacturer:YAGEO Description:NOTES 1Oversampling disabled. Static DAC performance will be improved with increased oversampling ratios. 2DNL measures the deviation of the actual DAC o/p voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal step value; for Cve DNL, the actual step values lie below the ideal step value. 3Value in brackets for V DD_IO = 2.375 V to 2.750 V. 4IDD or the circuit current is the continuous current required to drive the digital core without the I PLL. 5IAA is the total current required to supply all DACs including the V REF circuitry and the PLL circuitry. 6All DACs on. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：CA0612KRNPO9BN150 厂 家：YAGEO 封 装：06+ 批 号：SMD 数 量：120000 说 明：【自己库存】 |
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