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C0603JRNPO9BN181资料 | |
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C0603JRNPO9BN181 PDF Download |
File Size : 116 KB
Manufacturer:TDK Description:Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) A write pulse of less than 20ns duration will not initiate a write cycle. (3) A timer of duration tBLC max. begins with every LOW to HIGH transition of WE. If allowed to time out, a page or byte write will begin; however a transition from HIGH to LOW within tBLC max. stops the timer. (4) Input rise and fall times (10% and 90%) < 10 ns. |
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1PCS | 100PCS | 1K | 10K | ||
价 格 | |||||
型 号:C0603JRNPO9BN181 厂 家:TDK 封 装:06+ 批 号:SMD 数 量:120000 说 明:【自己库存】 |
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