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| BLM18HD102SN1资料 | |
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BLM18HD102SN1 PDF Download |
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File Size : 116 KB
Manufacturer:MURATA Description:Active-Low, Manual Reset Input. When MR is asserted low, RESET is asserted low, the internal watchdog timer is reset to zero, and WDPO is reset to high impedance (open drain). After the rising edge of MR, RESET is asserted for at least 100ms. Leave MR unconnected or connect to VCC if unused. |
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| 1PCS | 100PCS | 1K | 10K | ||
| 价 格 | |||||
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型 号：BLM18HD102SN1 厂 家：MURATA 封 装：07+ 批 号：SMD 数 量：240000 说 明：【自己库存】 |
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