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| 0805B224K250BT资料 | |
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0805B224K250BT PDF Download |
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File Size : 116 KB
Manufacturer:WALSIN Description: Typical values represent average readings at 25C and VDD = 5 V. Guaranteed by design and not subject to production test. 3PDISS is calculated from (IDD VDD). CMOS logic level inputs result in minimum power dissipation. 4See timing diagram (Figure 5) for location of measured values. All input control voltages are specified with tR = tF = 2 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Switching characteristics are measured using VDD = 5 V. Input logic should have a 1 V/µs minimum slew rate. |
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| 1PCS | 100PCS | 1K | 10K | ||
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型 号：0805B224K250BT 厂 家：WALSIN 封 装：06+ 批 号：SMD 数 量：120000 说 明：【自己库存】 |
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